Document Type: Research Paper
Electrical Engineering Department, Faculty of Electrical and Computer Engineering, Urmia University, Urmia, Iran
Electrical engineering department- Faculty of electrical and computer engineering- urmia university - urmia - iran
Abstract- Design and simulation of a very small size 6-bit DMTL phase shifter is presented. The idea is based on using both capacitor and resonator type methods simultaneously in a phase shifter. The capacitor section creates less significant bits. The bits in this section start from the least significant bit, with 5.625-degree steps. The resonator section creates the bits with 90-degree steps. CPW transmission line is used as an impedance matching between two type phase shifters. The structure is calculated and simulated at the Ka-band using MATLAB and HFSS softwares, respectively. The proposed method decreases the number of cells, considerably. As a result, the size and loss is decreased. The design can be easily scaled to other frequencies for satellite and radar systems.